Coenrad Fourie
Coenrad Fourie
Verified email at sun.ac.za
Title
Cited by
Cited by
Year
Implementation of energy efficient single flux quantum digital circuits with sub-aJ/bit operation
MH Volkmann, A Sahu, CJ Fourie, OA Mukhanov
Superconductor Science and Technology 26 (1), 015002, 2012
1372012
Three-dimensional multi-terminal superconductive integrated circuit inductance extraction
CJ Fourie, O Wetzstein, T Ortlepp, J Kunert
Superconductor Science and Technology 24 (12), 125015, 2011
982011
An integrated row-based cell placement and interconnect synthesis tool for large SFQ logic circuits
SN Shahsavani, TR Lin, A Shafaei, CJ Fourie, M Pedram
IEEE Transactions on Applied Superconductivity 27 (4), 1-8, 2017
532017
Status of superconductor electronic circuit design software
CJ Fourie, MH Volkmann
IEEE transactions on applied superconductivity 23 (3), 1300205-1300205, 2012
412012
Full-gate verification of superconducting integrated circuit layouts with InductEx
CJ Fourie
IEEE Transactions on Applied Superconductivity 25 (1), 1-9, 2014
392014
Digital superconducting electronics design tools—Status and roadmap
CJ Fourie
IEEE Transactions on Applied Superconductivity 28 (5), 1-12, 2018
382018
ColdFlux superconducting EDA and TCAD tools project: Overview and progress
CJ Fourie, K Jackman, MM Botha, S Razmkhah, P Febvre, CL Ayala, Q Xu, ...
IEEE Transactions on Applied Superconductivity 29 (5), 1-7, 2019
372019
Comparison of genetic algorithms to other optimization techniques for raising circuit yield in superconducting digital circuits
CJ Fourie, WJ Perold
IEEE transactions on applied superconductivity 13 (2), 511-514, 2003
322003
JoSIM—Superconductor SPICE simulator
JA Delport, K Jackman, P Le Roux, CJ Fourie
IEEE Transactions on Applied Superconductivity 29 (5), 1-5, 2019
312019
Simulated inductance variations in RSFQ circuit structures
CJ Fourie, WJ Perold
IEEE transactions on applied superconductivity 15 (2), 300-303, 2005
272005
Tetrahedral modeling method for inductance extraction of complex 3-D superconducting structures
K Jackman, CJ Fourie
IEEE Transactions on Applied Superconductivity 26 (3), 1-5, 2016
262016
Experimental investigation of energy-efficient digital circuits based on eSFQ logic
MH Volkmann, A Sahu, CJ Fourie, OA Mukhanov
IEEE transactions on applied superconductivity 23 (3), 1301505-1301505, 2013
252013
Experimentally verified inductance extraction and parameter study for superconductive integrated circuit wires crossing ground plane holes
CJ Fourie, O Wetzstein, J Kunert, H Toepfer, HG Meyer
Superconductor Science and Technology 26 (1), 015016, 2012
232012
Complete Monte Carlo model description of lumped-element RSFQ logic circuits
CJ Fourie, WJ Perold, HR Gerber
IEEE transactions on applied superconductivity 15 (2), 384-387, 2005
202005
Design and test of asynchronous eSFQ circuits
IV Vernik, SB Kaplan, MH Volkmann, AV Dotsenko, CJ Fourie, ...
Superconductor Science and Technology 27 (4), 044030, 2014
192014
Layout-versus-schematic verification for superconductive integrated circuits
RMC Roberts, CJ Fourie
IEEE Transactions on Applied Superconductivity 25 (3), 1-5, 2014
182014
Extraction of dc-biased sfq circuit verilog models
CJ Fourie
IEEE Transactions on Applied Superconductivity 28 (6), 1-11, 2018
172018
YBCO Josephson junctions and striplines for RSFQ circuits made by ion irradiation
T Wolf, N Bergeal, J Lesueur, CJ Fourie, G Faini, C Ulysse, P Febvre
IEEE Transactions on applied superconductivity 23 (2), 1101205-1101205, 2013
172013
Calibration of inductance calculations to measurement data for superconductive integrated circuit processes
CJ Fourie
IEEE transactions on applied superconductivity 23 (3), 1301305-1301305, 2012
172012
Flux trapping analysis in superconducting circuits
K Jackman, CJ Fourie
IEEE Transactions on Applied Superconductivity 27 (4), 1-5, 2016
162016
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Articles 1–20