Borivoje Nikolic

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Jan RabaeyProfessor of EECS, University of California at BerkeleyVerified email at berkeley.edu
Krste AsanovicUC BerkeleyVerified email at berkeley.edu
Tsu-Jae King LiuUniversity of CaliforniaVerified email at eecs.berkeley.edu
Dejan MarkovicProfessor of Electrical and Computer Engineering, UCLAVerified email at ee.ucla.edu
Ali M NIKNEJADUC BerkeleyVerified email at berkeley.edu
Vojin G. OklobdzijaUniversity of California, Emeritus Professor, IEEE Life Fellow, President IEEE CASVerified email at ieee.org
Martin WainwrightProfessor of EECS and Statistics, UC BerkeleyVerified email at berkeley.edu
Brian ZimmerSenior Research Scientist, NVIDIAVerified email at nvidia.com
Ben KellerNvidiaVerified email at eecs.berkeley.edu
Lara DolecekElectrical Engineering, UCLAVerified email at ee.ucla.edu
Vladimir StojanovicProfessor of Electrical Engineering and Computer Sciences, University of CaliforniaVerified email at berkeley.edu
Colin SchmidtPh.D. Candidate of Computer Science, UC BerkeleyVerified email at berkeley.edu
Ruzica JevticUniversidad CEU San PabloVerified email at ceu.es
Antonio PuglielliUC BerkeleyVerified email at berkeley.edu
Anant SAHAIEECS, University of California, BerkeleyVerified email at eecs.berkeley.edu
Vasuki Narasimha SwamyUniversity of California BerkeleyVerified email at berkeley.edu
Alberto PuggelliPh.D., Apple Inc.Verified email at eecs.berkeley.edu
W. Rhett DavisProfessor of Electrical and Computer Engineering, North Carolina State UniversityVerified email at ncsu.edu
Mark HorowitzProfessor of Electrical Engineering and Computer ScienceVerified email at ee.stanford.edu
Changhwan ShinProfessor at Korea UniversityVerified email at korea.ac.kr

Borivoje Nikolic

University of California Berkeley

Verified email at berkeley.edu - Homepage

Integrated circuits VLSI Communications Signal Processing


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Digital integrated circuits JM Rabaey, AP Chandrakasan, B Nikolic Prentice hall, 2002	9056	2002
Introduction to stochastic processes in biostatistics CL Chiang	2721*	1968
Improved sense-amplifier-based flip-flop: Design and measurements B Nikolic, VG Oklobdzija, V Stojanovic, W Jia, JKS Chiu, MMT Leung IEEE Journal of Solid-State Circuits 35 (6), 876-884, 2000	554	2000
A 14-b 12-MS/s CMOS pipeline ADC with over 100-dB SFDR Y Chiu, PR Gray, B Nikolic IEEE Journal of Solid-State Circuits 39 (12), 2139-2151, 2004	370	2004
Least mean square adaptive digital background calibration of pipelined analog-to-digital converters Y Chiu, CW Tsang, B Nikolic, PR Gray IEEE Transactions on Circuits and Systems I: Regular Papers 51 (1), 38-46, 2004	253	2004
Methods for true energy-performance optimization D Markovic, V Stojanovic, B Nikolic, MA Horowitz, RW Brodersen IEEE Journal of solid-state circuits 39 (8), 1282-1293, 2004	250	2004
Clocked CMOS adiabatic logic with integrated single-phase power-clock supply D Maksimovic, VG Oklobdzija, B Nikolic, KW Current IEEE Transactions on Very Large Scale Integration (VLSI) Systems 8 (4), 460-463, 2000	239	2000
Level conversion for dual-supply systems F Ishihara, F Sheikh, B Nikolic IEEE Transactions on Very Large Scale Integration (VLSI) Systems 12 (2), 185-195, 2004	236	2004
A 2.8 GS/s 44.6 mW time-interleaved ADC achieving 50.9 dB SNDR and 3 dB effective resolution bandwidth of 1.5 GHz in 65 nm CMOS D Stepanovic, B Nikolic IEEE Journal of Solid-State Circuits 48 (4), 971-982, 2013	223	2013
An efficient 10GBASE-T ethernet LDPC decoder design with low error floors Z Zhang, V Anantharam, MJ Wainwright, B Nikolic IEEE Journal of Solid-State Circuits 45 (4), 843-855, 2010	223	2010
FinFET-based SRAM design Z Guo, S Balasubramanian, R Zlatanovici, TJ King, B Nikolić Proceedings of the 2005 international symposium on Low power electronics and …, 2005	216	2005
Analysis of absorbing sets and fully absorbing sets of array-based LDPC codes L Dolecek, Z Zhang, V Anantharam, MJ Wainwright, B Nikolic IEEE Transactions on Information Theory 56 (1), 181-201, 2009	214	2009
High throughput low-density parity-check decoder architectures E Yeo, P Pakzad, B Nikolic, V Anantharam GLOBECOM'01. IEEE Global Telecommunications Conference (Cat. No. 01CH37270 …, 2001	202	2001
Analysis and design of low-energy flip-flops D Markovic, B Nikolic, R Brodersen Proceedings of the 2001 international symposium on Low power electronics and …, 2001	199	2001
Large-scale SRAM variability characterization in 45 nm CMOS Z Guo, A Carlson, LT Pang, KT Duong, TJK Liu, B Nikolic IEEE Journal of Solid-State Circuits 44 (11), 3174-3192, 2009	164	2009
VLSI architectures for iterative decoders in magnetic recording channels E Yeo, P Pakzad, B Nikolic, V Anantharam IEEE Transactions on Magnetics 37 (2), 748-755, 2001	163	2001
A design environment for high-throughput low-power dedicated signal processing systems WR Davis, N Zhang, K Camera, D Markovic, T Smilkstein, MJ Ammer, ... IEEE Journal of Solid-State Circuits 37 (3), 420-431, 2002	158	2002
Methods for true power minimization RW Brodersen, MA Horowitz, D Markovic, B Nikolic, V Stojanovic Proceedings of the 2002 IEEE/ACM international conference on Computer-aided …, 2002	151	2002
Energy–delay optimization of 64-bit carry-lookahead adders with a 240 ps 90 nm CMOS design example R Zlatanovici, S Kao, B Nikolic IEEE Journal of Solid-State Circuits 44 (2), 569-583, 2009	144	2009
Design of energy-and cost-efficient massive MIMO arrays A Puglielli, A Townley, G LaCaille, V Milovanović, P Lu, K Trotskovsky, ... Proceedings of the IEEE 104 (3), 586-606, 2015	143	2015

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