Universal asynchronous receiver and transmitter (uart) U Nanda, SK Pattnaik 2016 3rd international conference on advanced computing and communication …, 2016 | 97 | 2016 |
RF and linearity parameter analysis of junction-less gate all around (JLGAA) MOSFETs and their dependence on gate work function P Raut, U Nanda Silicon 14 (10), 5427-5435, 2022 | 36 | 2022 |
A high stable 8T-SRAM with bit interleaving capability for minimization of soft error rate D Nayak, DP Acharya, PK Rout, U Nanda Microelectronics Journal 73, 43-51, 2018 | 33 | 2018 |
Performance analysis of gate-stack dual-material DG MOSFET using work-function modulation technique for lower technology nodes SK Das, U Nanda, SM Biswal, CK Pandey, LI Giri Silicon 14 (6), 2965-2973, 2022 | 32 | 2022 |
Performance analysis of silicon nanotube dielectric pocket Tunnel FET for reduced ambipolar conduction A Singh, CK Pandey, U Nanda Microelectronics Journal 126, 105512, 2022 | 31 | 2022 |
A new transmission gate cascode current mirror charge pump for fast locking low noise PLL U Nanda, DP Acharya, SK Patra Circuits, Systems, and Signal Processing 33, 2709-2718, 2014 | 31 | 2014 |
Silicon nanowire GAA-MOSFET: A workhorse in nanotechnology for future semiconductor devices K Bhol, B Jena, U Nanda Silicon 14 (7), 3163-3171, 2022 | 26 | 2022 |
Design of an efficient phase frequency detector to reduce blind zone in a PLL U Nanda, DP Acharya, SK Patra Microsystem Technologies 23, 533-539, 2017 | 26 | 2017 |
Nanowire array-based MOSFET for future CMOS technology to attain the ultimate scaling limit K Bhol, U Nanda Silicon 14 (3), 1169-1177, 2022 | 25 | 2022 |
RF with linearity and non-linearity parameter analysis of gate all around negative capacitance junction less FET (GAA-NC-JLFET) for different ferroelectric thickness P Raut, U Nanda, DK Panda Physica Scripta 97 (10), 105809, 2022 | 20 | 2022 |
Smart power theft detection system NK Mucheli, U Nanda, D Nayak, PK Rout, SK Swain, SK Das, SM Biswal 2019 Devices for Integrated Circuit (DevIC), 302-305, 2019 | 20 | 2019 |
Design of LC VCO for optimal figure of merit performance using CMODE PK Rout, UK Nanda, DP Acharya, G Panda 2012 1st International Conference on Recent Advances in Information …, 2012 | 18 | 2012 |
A charge-based analytical model for gate all around junction-less field effect transistor including interface traps P Raut, U Nanda ECS Journal of Solid State Science and Technology 11 (5), 051006, 2022 | 17 | 2022 |
A novel charge recycle read write assist technique for energy efficient and fast 20 nm 8T-SRAM array D Nayak, DP Acharya, PK Rout, U Nanda Solid-State Electronics 148, 43-50, 2018 | 17 | 2018 |
Design and implementation of different types of full adders in ALU and leakage minimization SK Pattnaik, U Nanda, D Nayak, SR Mohapatra, AB Nayak, A Mallick 2017 International Conference on Trends in Electronics and Informatics (ICEI …, 2017 | 17 | 2017 |
Recent trends on junction-less field effect transistors in terms of device topology, modeling, and application P Raut, U Nanda, DK Panda ECS Journal of Solid State Science and Technology 12 (3), 031010, 2023 | 15 | 2023 |
Performance analysis of ferroelectric gaa mosfet with metal grain work function variability B Jena, K Bhol, U Nanda, S Tayal, SR Routray Silicon 14 (6), 3005-3012, 2022 | 15 | 2022 |
Design of a low noise PLL for GSM application U Nanda, DP Acharya, SK Patra 2013 International conference on Circuits, Controls and Communications …, 2013 | 14 | 2013 |
Design and implementaton of SRAM macro unit SN Panda, S Padhi, V Phanindra, U Nanda, SK Pattnaik, D Nayak 2017 International Conference on Trends in Electronics and Informatics (ICEI …, 2017 | 12 | 2017 |
Effect of high-K spacer on the performance of non-uniformly doped DG-MOSFET SK Swain, SK Das, SM Biswal, S Adak, U Nanda, AA Sahoo, D Navak, ... 2019 Devices for Integrated Circuit (DevIC), 510-514, 2019 | 11 | 2019 |