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C. Kothandaraman
C. Kothandaraman
ON Semiconductor
Verified email at onsemi.com
Title
Cited by
Cited by
Year
Electrically programmable fuse (eFUSE) using electromigration in silicides
C Kothandaraman, SK Iyer, SS Iyer
IEEE Electron Device Letters 23 (9), 523-525, 2002
2732002
Electrically programmable fuse (efuse): From memory redundancy to autonomic chips
N Robson, J Safran, C Kothandaraman, A Cestero, X Chen, ...
2007 IEEE Custom Integrated Circuits Conference, 799-804, 2007
1892007
3D copper TSV integration, testing and reliability
MG Farooq, TL Graves-Abe, WF Landers, C Kothandaraman, BA Himmel, ...
2011 international electron devices meeting, 7.1. 1-7.1. 4, 2011
1352011
A cost effective 32nm high-K/metal gate CMOS technology for low power applications with single-metal/gate-first process
X Chen, S Samavedam, V Narayanan, K Stein, C Hobbs, C Baiocco, W Li, ...
2008 Symposium on VLSI Technology, 88-89, 2008
1302008
A compact eFuse programmable array memory for SOI CMOS
J Safran, A Leslie, G Fredeman, C Kothandaraman, A Cestero, X Chen, ...
2007 IEEE Symposium on VLSI Circuits, 72-73, 2007
1172007
A commercial field-programmable dense eFUSE array memory with 99.999% sense yield for 45nm SOI CMOS
G Uhlmann, T Aipperspach, T Kirihata, C Kothandaraman, YZ Li, C Paone, ...
2008 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2008
1102008
System for programming fuse structure by electromigration of silicide enhanced by creating temperature gradient
C Kothandaraman, SSK Iyer, S Iyer, C Narayan
US Patent 6,624,499, 2003
1082003
Reliability qualification of CoSi2 electrical fuse for 90nm technology
C Tian, B Park, C Kothandaraman, J Safran, D Kim, N Robson, SS Iyer
2006 IEEE International Reliability Physics Symposium Proceedings, 392-397, 2006
1042006
A 0.13 mum Logic-Based Embedded DRAM Technology With Electrical Fuses, Cu Interconnect in SiLK™, Sub-7ns Random Access Time and Its Extention to the 0.10 mum Generation
V Klee, J Norum, R Weaver, SSK Iyer, CR Kothandaraman, J Chiou, ...
INTERNATIONAL ELECTRON DEVICES MEETING 1 (1), 407-410, 1998
911998
Reprogrammable fuse structure and method
GW Burr, C Kothandaraman, CH Lam, XH Liu, SM Rossnagel, CS Tyberg, ...
US Patent 7,388,273, 2008
892008
Reliability investigation of NiPtSi electrical fuse with different programming mechanisms
CE Tian, D Moy, C Le, B Messenger, C Kothandaraman, J Safran, S Wu, ...
IEEE Transactions on Device and Materials Reliability 8 (3), 536-542, 2008
802008
Changing chip function based on fuse states
KR Erickson, JA Fifield, C Kothandaraman, PC Paone, WR Tonti
US Patent 7,268,577, 2007
762007
Spin-transfer torque MRAM with reliable 2 ns writing for last level cache applications
G Hu, JJ Nowak, MG Gottwald, SL Brown, B Doris, CP D’Emic, P Hashemi, ...
2019 IEEE International Electron Devices Meeting (IEDM), 2.6. 1-2.6. 4, 2019
512019
Programmable fuse/non-volatile memory structures in BEOL regions using externally heated phase change material
KN Chen, BG Elmegreen, D Kim, C Kothandaraman, L Krusin-Elbaum, ...
US Patent 7,633,079, 2009
502009
Enhanced efuses by the local degradation of the fuse link
C Kothandaraman, F Grellner, SK Iyer
US Patent 6,368,902, 2002
472002
The Impact of Self-Heating on Charge Trapping in High--Metal-Gate nFETs
F Khan, E Cartier, C Kothandaraman, JC Scott, JCS Woo, SS Iyer
IEEE Electron Device Letters 37 (1), 88-91, 2015
442015
Antifuse structure having an integrated heating element
B Park, SS Iyer, C Kothandaraman
US Patent 7,323,761, 2008
442008
Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable
AR Bonaccio, KR Erickson, JA Fifield, C Kothandaraman, PC Paone, ...
US Patent 7,442,583, 2008
432008
Physically unclonable fuse using a NOR type memory array
SS Iyer, T Kirihata, C Kothandaraman, DH Leu, S Rosenblatt
US Patent 9,436,845, 2016
412016
Modified donor–acceptor pair luminescence in heavily nitrogen‐doped zinc selenide
C Kothandaraman, GF Neumark, RM Park
Applied physics letters 67 (22), 3307-3309, 1995
391995
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